Re: PCI IRQ routing problem in 2.4.0

Linus Torvalds (torvalds@transmeta.com)
Mon, 29 Jan 2001 09:34:40 -0800 (PST)


On Mon, 29 Jan 2001, Martin Diehl wrote:
>
> Right, seems the 0x41/0x01 thing. I have the 0x01 case with SiS 85C503
> router rev. 01. Hopefully the 0x41 boards have a different revision. My
> fear however is, this is due to BIOS implementation of the routing table.
>
> Using the docs of the 85C503 function from the SiS5595 southbridge
> datasheet I've written a patch to get things right - at least for the 0x01
> case. The mapping on my box appears as follows:
>
> link/pirq value config-reg function
> 0x01/0x02/0x03/0x04 0x41/0x42/0x43/0x44 PCI INTA..D
> 0x61 0x61 5513 onboard IDE
> 0x62 0x62 onboard USB (OHCI)
> 0x6a 0x6a onboard ACPI
> 0x7e 0x7e onboard data acquisition

I bet that we can fix this up easily.

I bet the "translation" is just something like

reg = pirq;
if (reg < 5)
reg += 0x40;

and that what happened was that SiS _originally_ only specified INTA-INTD,
and specified them as pirq link values 0x01-0x04, mapping to config
registers 0x41-0x44.

Later on they noticed that they wanted to do the other things too, and
they expanded the definition to be "for any other value, it's the config
space address".

> BTW: I was wondering, why we did not update the PCI_INTERRUPT_LINE in
> config space when we re-route dev->irq. Well, documentation/pci.txt says
> we should trust on dev->irq over config space, however stopping lspci
> and friends to confuse us would be too bad either. So I've included a
> one-liner to fix this.

I would prefer _not_ to see this.

Why? Because it's (a) real information what the PCI config space was, and
it might help debug things in the future. And (b) I've seen to many broken
BIOSes that do not re-initialize hardware fully over a soft boot, that I
worry that you'll get different behaviour after doing a "shutdown -r" with
this.

I'd rather not touch config space more than necessary.

Linus

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