patch to let 2.4.1-pre3 compile on PIII
we are moving from HAVE_XMM to cpu_has_xmm right?
--===================================================================== Mohammad A. Haque http://www.haque.net/ mhaque@haque.net
"Alcohol and calculus don't mix. Project Lead Don't drink and derive." --Unknown http://wm.themes.org/ batmanppc@themes.org ===================================================================== --------------5BEF60DFBBBB4FBF6AD6D380 Content-Type: text/plain; charset=us-ascii; name="xmm-fix.diff" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="xmm-fix.diff"
--- linux/include/asm-i386/xor.h.orig Thu Jan 11 21:55:49 2001 +++ linux/include/asm-i386/xor.h Thu Jan 11 22:22:18 2001 @@ -843,7 +843,7 @@ do { \ xor_speed(&xor_block_8regs); \ xor_speed(&xor_block_32regs); \ - if (HAVE_XMM) \ + if (cpu_has_xmm) \ xor_speed(&xor_block_pIII_sse); \ if (md_cpu_has_mmx()) { \ xor_speed(&xor_block_pII_mmx); \ @@ -855,4 +855,4 @@ We may also be able to load into the L1 only depending on how the cpu deals with a load to a line that is being prefetched. */ #define XOR_SELECT_TEMPLATE(FASTEST) \ - (HAVE_XMM ? &xor_block_pIII_sse : FASTEST) + (cpu_has_xmm ? &xor_block_pIII_sse : FASTEST)
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