Assume that data access time (1 word) from cache memory is 2 ns, and 10 ns from main memory. Cache block (line) size is four words. Assume that 97% of memory references are found from the cache when cache is used. You may (unrealistically) assume that there is always room for a new block in the cache and that the data transfer time from MBR to cache is zero.
Assume that there is an operating system for TTK-91. One part of that OS is the process control. Assume further that due to a clock interrupt we need to switch the process that runs on the processor.
If the selection values are integer valued, starting from zero and making up more or less contiquous value set, then one can use a jump table instead of many if-then-else type comparisons. With jump table one can reach the right case in a fixed time with just a few machine instructions. Jump table contains many jump instructions (one per case), of which one is selected with indexed addressing mode. For example, if register R3 contains the selection value, and jump table address is JTBL, then the right jump instruction is selected in the jump table with machine instruction "JUMP JTBL(R3)".