Computer Organization II,  Autumn 2010, HW 2

1. Boolean expressions and gates
   1. Problem 20.4 [Sta10, Online Chapter 20]      (Probl B.4 [Sta06] or Probl A.4 [Sta03])
   2. Problem 20.6 [Sta10]      (Probl B.6 [Sta06] or Probl A.6 [Sta03])


2. Circuits and Simplification: Problem 20.8. for LED segment Z6 only [Sta10]     (Probl B.8 [Sta06] or Probl A.8 [Sta03])
   Note: The Boolean expression format is enough, there is no need to draw the circuit itself.


3. VAX SBI and PCI bus write
   1. Problem 3.9 [Sta10 & Sta06]     (Probl 3.8 [Sta03])
   2. Problem 3.19 [Sta10 & Sta06]     (Probl 3.10 [Sta03])  


4. Multibus
   1. Problem 3.8 [Sta10 & Sta06]    (Probl 3.7 [Stal03])
      
   2. How does one prevent two devices to act simultaneously as Bus Masters, when they both try to use the bus at the same time? Who makes the decision? Which device (or devices) get the turn? How does one know that it got the turn?
   3. What determines, how many devices can be attached to the bus?


5. PCI-bus.
   1. Assume that the memory circuit can locate the target data in one, two or 3 clock cycles. How does the memory circuit tell this to the CPU? See Fig 3.23 [Sta10 & Sta06 & Sta03]
   2. Assume that the last data set has only 1 byte of data even though the data bus is 32 bits wide. Who determines which 8 wires are used to transmit that byte? When and how that information is given to the other party?
   3. What happens if three devices want simultaneously use the bus? Who makes the decision? Which device (or devices) get the turn? How does one know that it got the turn? Will signals get crossed, when all devices have the REQ-pin at the same location?